New Silicon Motion SM2524XT chip brings 14 GB/s to mainstream SSDs — 6nm DRAMless controller boasts heavy AI PC optimization and slashes KV cache latency
While high-end SSDs with eight-channel controllers approached peak read speeds of around 14 GB/s years ago, mainstream drives with quad-channel controllers often offer around 11 GB/s. However, with new types of 3D NAND that feature a higher-speed interface, it is possible to get to 14 GB/s with just four NAND channels. This is exactly what Silicon Motion’s SM2524XT controller is designed to do: it has four NAND channels that support transfer rates of up to 4,800 MT/s and can offer up to 14 GB/s read speeds.
Silicon Motion’s SM2524XT controller is based on four (presumably Arm Cortex-R-series) cores, does not use DRAM, and complies with the NVM 2.0 specification. The unit has four NAND channels supporting data transfer rates of up to 4,800 MT/s as well as a PCIe 5.0 x4 host interface. The platform supports the latest types of 3D TLC and 3D QLC NAND and features SMI’s NANDXtend LDPC ECC technology to cope with the inevitable read errors of the latest flash memory, though Silicon Motion hasn’t disclosed the generation of the NAND or the codeword size.
The company says the controller can deliver up to 2.5 million random IOPS alongside sequential read speeds reaching 14 GB/s, which is a very good result for mainstream solid-state drives. SMI uses TSMC’s services to produce the controller using a 6nm-class process technology.
Compared to its predecessor introduced about a year ago, the SM2524XT boosts random workload throughput by as much as 25%, reduces latency, and improves responsiveness during the fragmented read/write operations typical of KV cache and AI inference tasks. In fact, KV cache and enhanced AI inference performance are among the key advantages of the new SSD controller platform.
“KV Cache has become a critical factor in AI inference performance, driving the need for sustained high random read/write throughput and low-latency data access,” said Nelson Duann, Senior VP of Client & Automotive Storage Business at Silicon Motion. “As AI PCs evolve to support increasingly complex Local Agent and on-device LLM workloads, the SM2524XT is designed to deliver the random I/O performance, latency stability, and power efficiency required for next-generation AI storage architectures.”
KV cache is a storage area used by AI models to keep previously processed data so the model does not need to recalculate it for every new token. While this significantly reduces compute overhead, it also creates massive amounts of small, random, latency-sensitive memory and storage accesses. While this may not be a big problem in the data center environment, it may create performance bottlenecks when AI workloads run locally on a PC with a relatively limited DRAM capacity. As a result, latency and KV cache performance may limit the performance of long-context and multi-agent workloads.
To address these performance penalties, the SM2524XT controller integrates several of Silicon Motion’s technologies, including Separated Command Address (SCA) technology, which separates command and address traffic inside the NAND interface and enables the controller to process both simultaneously (rather than serially) to lower latency, increase effective bandwidth, and therefore maintain predictable performance. As an added bonus, these technologies make SM2524XT useful not only for PCs but also for edge AI devices.
Silicon Motion will certainly demonstrate prototype drives based on its latest SM2524XT controller at the upcoming Computex trade show next week, which is when we learn when the company expects actual SSDs based on the chip to hit the market. Yet, it is safe to say that they are not going to arrive earlier than next year.
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